Fin design level mask decomposition for directed self assembly
US8656322B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2013 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | Jan 18, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A design layout including shapes of target areas for forming semiconductor fins employing directed self-assembly can be decomposed into guiding patterns and cut patterns. The lengthwise edges of the shapes of target areas are adjusted. Widthwise edges of the adjusted shapes are extended outward to generate diffusion shapes. Guiding pattern shapes are then generated employing the diffusion shapes. Taper edges are adjusted based on process bias of a photoresist material to be subsequently employed. Optionally, a portion of a guiding pattern shape between diffusion shapes may be removed as a connection shape. The guiding pattern shapes can define at least one guiding pattern mask for lithographic pattern of guiding pattern shapes, and cut shapes can be derived from the diffusion shapes and the guiding pattern shapes. The guiding pattern shapes and the cut shapes may be adjusted to accommodate effects at device cell edges and at device macro edges.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.