Lateral connection for a via-less thin film resistor
US8659085B2 · kind B2 · utility
4Cited by
38References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 24, 2010 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Apr 27, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present disclosure is directed to an integrated circuit having a substrate and a first and a second interconnect structure over the substrate. Each interconnect structure has a first conductive layer over the substrate and a second conductive layer over the first conductive layer. The integrated circuit also includes a thin film resistor over a portion of the substrate between the first and the second interconnect structure that electrically connects the first conductive layers of the first and second interconnect structures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.