Integrated circuit stack
US8659898B2 · kind B2 · utility
10Cited by
37References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 7, 2012 |
| Grant date | Feb 25, 2014 |
| Priority date | — |
| Expiry date | Aug 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06589
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to an integrated circuit stack (1) comprising a plurality of integrated circuit layers (2) and at least one cooling layer (3) arranged in a space between two circuit layers (2). The integrated circuit stack (1) is cooled using a cooling fluid (10) pumped through the cooling layer (3). The invention further relates to a method for configuring of such an integrated circuit stack (1) by optimizing a configuration of the cooling layer (3).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.