Formation of a channel semiconductor alloy by forming a nitride based hard mask layer

US8664066B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Rohit Pal · Fishkill, US
• Stephan Kronholz · Dresden, DE

Key dates

• Filing date: Jul 19, 2012
• Grant date: Mar 4, 2014
• Expiry date: Aug 8, 2032

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02P80/30

Abstract

The present disclosure provides manufacturing techniques in which sophisticated high-k metal gate electrode structures may be formed in an early manufacturing stage on the basis of a selectively applied threshold voltage adjusting semiconductor alloy. In order to reduce the surface topography upon patterning the deposition mask while still allowing the usage of well-established epitaxial growth recipes developed for silicon dioxide-based hard mask materials, a silicon nitride base material may be used in combination with a surface treatment. In this manner, the surface of the silicon nitride material may exhibit a silicon dioxide-like behavior, while the patterning of the hard mask may be accomplished on the basis of highly selective etch techniques.