Inventor · Fishkill, NY, US

Rohit Pal

45Patents
10h-index
48Co-inventors
71Inventor score

Filing activity: Oct 30, 2003 → Nov 10, 2016

Most-cited inventions

PatentTitleAreaCited byStatus
US9362180B2 Integrated circuit having multiple threshold voltages Electricity 405 Active
US7195036B2 Thermal micro-valves for micro-integrated devices Emerging Cross-Sectional Technologies 71 Expired
US7534689B2 Stress enhanced MOS transistor and methods for its fabrication Electricity 61 Active
US7932143B1 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods Electricity 23 Active
US9455201B2 Integration method for fabrication of metal gate based multiple threshold voltage devices and circuits Electricity 17 Active
US9209186B1 Threshold voltage control for mixed-type non-planar semiconductor devices Electricity 14 Active
US7670934B1 Methods for fabricating MOS devices having epitaxially grown stress-inducing source and drain regions Electricity 14 Active
US8076209B2 Methods for fabricating MOS devices having highly stressed channels Electricity 11 Active
US7767534B2 Methods for fabricating MOS devices having highly stressed channels Electricity 11 Active
US8294211B2 Semiconductor transistor device structure with back side gate contact plugs, and related manufacturing method Electricity 10 Active
US7994014B2 Semiconductor devices having faceted silicide contacts, and related fabrication methods Electricity 9 Active
US7960229B2 Metal oxide semiconductor transistor with reduced gate height, and related fabrication methods Electricity 8 Active
US9362284B2 Threshold voltage control for mixed-type non-planar semiconductor devices Electricity 7 Active
US8026539B2 Metal oxide semiconductor devices having doped silicon-compromising capping layers and methods for fabricating the same Electricity 6 Active
US7939852B2 Transistor device having asymmetric embedded strain elements and related manufacturing method Electricity 6 Active
US8148750B2 Transistor device having asymmetric embedded strain elements and related manufacturing method Electricity 4 Active
US8598009B2 Self-aligned embedded SiGe structure and method of manufacturing the same Electricity 3 Active
US8198192B2 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization Electricity 3 Active
US8222673B2 Self-aligned embedded SiGe structure and method of manufacturing the same Electricity 3 Active
US9159567B1 Replacement low-K spacer Electricity 3 Active
US8217463B2 Methods for protecting gate stacks during fabrication of semiconductor devices and semiconductor devices fabricated from such methods Electricity 2 Active
US8525289B2 Adjusting threshold voltage for sophisticated transistors by diffusing a gate dielectric cap layer material prior to gate dielectric stabilization Electricity 2 Active
US9875936B1 Spacer defined fin growth and differential fin width Electricity 2 Active
US8664066B2 Formation of a channel semiconductor alloy by forming a nitride based hard mask layer Emerging Cross-Sectional Technologies 2 Active
US8373228B2 Semiconductor transistor device structure with back side source/drain contact plugs, and related manufacturing method Electricity 2 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.