Semiconductor structures with thinned junctions and methods of manufacture
US8669146B2 · kind B2 · utility
4Cited by
13References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 13, 2011 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Mar 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/811
Abstract
A method of forming a semiconductor structure, including forming a channel in a first portion of a semiconductor layer and forming a doped extension region in a second portion of the semiconductor layer abutting the channel on a first side and abutting an insulator material on a bottom side. The first portion of the semiconductor layer is thicker than the second portion of the semiconductor layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.