Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices

US8669615B1 · kind B1 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Josephine B. Chang · Mahopac, US
• Isaac Lauer · Yorktown Heights, US
• Chung-Hsun Lin · White Plains, US
• Jeffrey W. Sleight · Ridgefield, US

Key dates

• Filing date: Sep 12, 2012
• Grant date: Mar 11, 2014
• Expiry date: Sep 12, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/011

Abstract

Techniques are provided for gate work function engineering in FIN FET devices using a work function setting material an amount of which is provided proportional to fin pitch. In one aspect, a FIN FET device is provided. The FIN FET device includes a SOI wafer having an oxide layer and a SOI layer over a BOX, and a plurality of fins patterned in the oxide layer and the SOI layer; an interfacial oxide on the fins; and at least one gate stack on the interfacial oxide, the gate stack having (i) a conformal gate dielectric layer present, (ii) a conformal gate metal layer, and (iii) a conformal work function setting material layer. A volume of the conformal gate metal layer and a volume of the conformal work function setting material layer present in the gate stack is proportional to a pitch of the fins.