Methods of forming copper-based conductive structures by forming a copper-based seed layer having an as-deposited thickness profile and thereafter performing an etching process and electroless copper deposition
US8673766B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2012 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | May 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76879
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are various methods of forming copper-based conductive structures on integrated circuit devices. In one example, the method includes forming a trench/via in a layer of insulating material, performing a deposition process to form an as-deposited copper-based seed layer above the layer of insulating material in the trench/via, wherein the copper-based seed layer has a first portion that is positioned above a bottom of the trench/via that is thicker than second portions of the copper seed layer that are positioned above sidewalls of the trench/via, performing an etching process on the as-deposited copper-based seed layer to substantially remove portions of the second portions of the as-deposited copper-based seed layer and performing an electroless deposition process to fill the trench/via with a copper-based material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.