Reviewed defect selection processing method, defect review method, reviewed defect selection processing tool, and defect review tool
US8675949B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2010 |
| Grant date | Mar 18, 2014 |
| Priority date | — |
| Expiry date | Nov 14, 2030 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01N2021/8867
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The present invention relates to semiconductor inspection and provides a technology capable of efficiently detecting a systematic defect. In the present system, with regard to the process (S7, S8) of matching hot spot (HS) points that can be simulated in advance and defect points obtained as a result of a visual inspection each other and the unmatched defect points, a process (S6, S9) of classifying the defect points into groups based on similarity of pattern layout at the defect points to determine the defects belonging to a pattern layout where defects frequently occur, thereby reliably detecting the systematic defect. Also, with a process (S11) of acquiring an uneven distribution in a defect occurrence distribution on a wafer, the systematic defect occurring due to topography of the wafer can also be detected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.