Method of manufacturing silicon carbide epitaxial wafer
US8679952B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2011 |
| Grant date | Mar 25, 2014 |
| Priority date | — |
| Expiry date | Mar 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8325
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method is provided in order to manufacture a silicon carbide epitaxial wafer whose surface flatness is very good and has a very low density of carrot defects and triangular defects arising after epitaxial growth. The silicon carbide epitaxial wafer is manufactured by a first step of annealing a silicon carbide bulk substrate that is tilted less than 5 degrees from <0001> face, in a reducing gas atmosphere at a first temperature T1 for a treatment time t, a second step of reducing the temperature of the substrate in the reducing gas atmosphere, and a third step of performing epitaxial growth at a second temperature T2 below the annealing temperature T1 in the first step, while supplying at least a gas including silicon atoms and a gas including carbon atoms.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.