Semiconductor chip device with underfill
US8691626B2 · kind B2 · utility
19Cited by
4References
21Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Sep 9, 2010 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Sep 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing is provided that includes placing a removable cover on a surface of a substrate. The substrate includes a first semiconductor chip positioned on the surface. The first semiconductor chip includes a first sidewall. The removable cover includes a second sidewall positioned opposite the first sidewall. A first underfill is placed between the first semiconductor chip and the surface wherein the second sidewall provides a barrier to flow of the first underfill. Various apparatus are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.