Method of manufacturing semiconductor structure
US8691688B2 · kind B2 · utility
0Cited by
64References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2012 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Jun 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76898
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of processing a substrate is provided. The method includes: providing a substrate, wherein the substrate includes a silicon layer; etching the substrate to form a cavity; filling a first conductor in part of the cavity; performing a first thermal treatment on the first conductor; filling a second conductor in the cavity to fill-up the cavity; and performing a second thermal treatment on the first conductor and the second conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.