FTP memory device with single selection transistor
US8693256B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2010 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Nov 19, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2216/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory device integrated in a chip of semiconductor material. An embodiment of a memory device includes a plurality of memory cells. Each memory cell includes a first well and a second well of a first type of conductivity that are formed in an insulating region of a second type of conductivity. The memory cell further includes a first, a second, and a third region of the second type of conductivity that are formed in the first well; these regions define a selection transistor of MOS type and a storage transistor of floating gate MOS type that are coupled in series. Moreover, the memory device includes a selection gate of the selection transistor, a floating gate of the storage transistor, and a control gate of the storage transistor formed in the second well; the control gate is capacitively coupled with the floating gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.