Method of manufacturing semiconductor devices using ion implantation
US8710620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2012 |
| Grant date | Apr 29, 2014 |
| Priority date | — |
| Expiry date | Jul 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/157
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A manufacturing method provides a semiconductor device with a substrate layer and an epitaxial layer adjoining the substrate layer. The epitaxial layer includes first columns and second columns of different conductivity types. The first and second columns extend along a main crystal direction along which channeling of implanted ions occurs from a first surface into the epitaxial layer. A vertical dopant profile of one of the first and second columns includes first portions separated by second portions. In the first portions a dopant concentration varies by at most 30%. In the second portions the dopant concentration is lower than in the first portions. The ratio of a total length of the first portions to the total length of the first and second portions is at least 50%. The uniform dopant profiles improve device characteristics.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.