Combined conductive plug/conductive line memory arrays and methods of forming the same
US8716059B2 · kind B2 · utility
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14Claims
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Key dates
| Filing date | Feb 2, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Feb 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8828
Abstract
Memory arrays and methods of forming the same are provided. One example method of forming a memory array can include forming a conductive material in a number of vias and on a substrate structure, the conductive material to serve as a number of conductive lines of the array and coupling the number of conductive lines to the array circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.