Roberto Somaschini
25Patents
4h-index
19Co-inventors
56Inventor score
Filing activity: Mar 16, 2010 → Oct 13, 2020
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9806129B2 | Cross-point memory and methods for fabrication of same | Electricity | 11 | Active |
| US10854674B2 | Cross-point memory and methods for fabrication of same | Electricity | 6 | Active |
| US9246100B2 | Memory cell array structures and methods of forming the same | Physics | 4 | Active |
| US9773844B2 | Memory cell array structures and methods of forming the same | Physics | 4 | Active |
| US8759980B2 | Forming array contacts in semiconductor memories | Electricity | 4 | Active |
| US8569891B1 | Forming array contacts in semiconductor memories | Electricity | 4 | Active |
| US9059261B2 | Forming array contacts in semiconductor memories | Electricity | 3 | Active |
| US10227233B2 | MEMS device formed by at least two bonded structural layers and manufacturing process thereof | Performing Operations; Transporting | 3 | Active |
| US10157788B2 | Self-aligned interconnection for integrated circuits | Electricity | 3 | Active |
| US10084016B2 | Cross-point memory and methods for fabrication of same | Electricity | 3 | Active |
| US9627251B2 | Forming array contacts in semiconductor memories | Electricity | 2 | Active |
| US10954121B2 | MEMS device formed by at least two bonded structural layers and manufacturing process thereof | Performing Operations; Transporting | 2 | Active |
| US9172037B2 | Combined conductive plug/conductive line memory arrays and methods of forming the same | Electricity | 2 | Active |
| US9269747B2 | Self-aligned interconnection for integrated circuits | Electricity | 1 | Active |
| US10570009B2 | MEMS device formed by at least two bonded structural layers and manufacturing process thereof | Performing Operations; Transporting | 0 | Active |
| US8716059B2 | Combined conductive plug/conductive line memory arrays and methods of forming the same | Electricity | 0 | Active |
| US11600665B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US10367033B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US11049769B2 | Self-aligned interconnection for integrated circuits | Electricity | 0 | Active |
| US9899254B2 | Forming array contacts in semiconductor memories | Electricity | 0 | Active |
| US9570681B2 | Resistive random access memory | Electricity | 0 | Active |
| US10364145B2 | Process for manufacturing a microelectronic device having a black surface, and microelectronic device | Physics | 0 | Active |
| US8860223B1 | Resistive random access memory | Electricity | 0 | Active |
| US10910437B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US11056383B2 | Forming array contacts in semiconductor memories | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.