Patent · US Active

High productivity combinatorial dual shadow mask design

US8716115B2 · kind B2 · utility

0Cited by
13References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 18, 2011
Grant dateMay 6, 2014
Priority date—
Expiry dateFeb 5, 2032

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB01J2219/0075
  • WIPO fieldSurface technology, coating
  • WIPO sectorChemistry

Abstract

Dual shadow mask design can overcome the size and resolution limitations of shadow masks to provide capacitor structures with small effective areas. The capacitor structures have bottom and top electrode layers patterned using shadow masks, sandwiching a dielectric layer. The effective areas of the capacitors are the overlapping areas of the top and bottom electrodes, thus allowing small area sizes without subjected to the size limitation of the electrodes. The dual shadow mask design can be used in conjunction with high productivity combinatorial processes for screening and optimizing dielectric materials and fabrication processes.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.