Configurable cache and method to configure same
US8719503B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 25, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | Jul 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/601
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes receiving an address at a tag state array of a cache. The cache is configurable to have a first size or a second size that is larger than the first size. The method includes identifying a first portion of the address as a set index and using the set index to locate at least one tag field of the tag state array. The method also includes identifying a second portion of the address to compare to a value stored at the at least one tag field and locating at least one state field of the tag state array associated with a particular tag field that matches the second portion. The method further includes identifying a cache line based on a comparison of a third portion of the address to at least two status bits of the at least one state field and retrieving the cache line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.