Process of fabricating a circuit board
US8720053B2 · kind B2 · utility
0Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 5, 2009 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Mar 4, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A process for fabricating a circuit board that includes a dielectric layer, a circuit layer, and an insulation layer. The circuit layer is disposed on the dielectric layer and has a pad region and a trace region. The insulation layer is disposed on the circuit layer and covers the trace region. Here, a thickness of the pad region is less than a thickness of the trace region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.