Capacitors and methods of forming
US8722503B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 18, 2011 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Feb 27, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/85
Abstract
Capacitors and methods of forming semiconductor device capacitors are disclosed. Trenches are formed to define a capacitor bottom plate in a doped upper region of a semiconductor substrate, a dielectric layer is formed conformally over the substrate within the trenches, and a polysilicon layer is formed over the dielectric layer to define a capacitor top plate. A guard ring region of opposite conductivity and peripheral recessed areas may be added to avoid electric field crowding. A central substrate of lower doping concentration may be provided to provide a resistor in series below the capacitor bottom plate. A series resistor may also be provided in a resistivity region of the polysilicon layer laterally extending from the trenched area region. Contact for the capacitor bottom plate may be made through a contact layer formed on a bottom of the substrate. A top contact may be formed laterally spaced from the trenched area by patterning laterally extended portions of one or more of the dielectric, polysilicon and top metal contact layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.