Non-volatile memory
US8723249B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 23, 2013 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | May 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/037
Abstract
A non-volatile memory includes a substrate, a gate dielectric layer, a gate conductive layer, a nitride layer, a spacer, a first oxide layer, and a second oxide layer. The gate conductive layer, substrate and gate dielectric layer cooperatively constitute a symmetrical opening thereamong. The nitride layer has an L-shape and formed with a vertical part extending along a sidewall of the gate conductive layer and a horizontal part extending into the opening, wherein the vertical part and the horizontal part are formed as an integral structure and a height of the vertical part is below a top surface of the gate conductive layer. The spacer is disposed on the substrate and the nitride layer. The first oxide layer is disposed among the gate conductive layer, the nitride layer and the gate dielectric layer. The second oxide layer is disposed among the gate dielectric layer, the nitride layer and the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.