Patent · US Active

Semiconductor structure with lamella defined by singulation trench

US8723276B2 · kind B2 · utility

1Cited by

18References

14Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Boris Binder · Dresden, DE
Bernd Foeste · Dresden, DE
Thoralf Kautzsch · Dresden, DE
Stefan Kolb · Unterschleißheim, DE
Marco Mueller · Villach, AT

Key dates

Filing date	Oct 5, 2010
Grant date	May 13, 2014
Priority date	—
Expiry date	Oct 14, 2030

Classification

Technology area (CPC G)Physics
CPC primaryG01L15/00
WIPO fieldMeasurement
WIPO sectorInstruments

Abstract

A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.