Reconstituted wafer warpage adjustment
US8728831B2 · kind B2 · utility
1Cited by
11References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 30, 2010 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Nov 2, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/67288
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for reducing warpage of a semiconductor wafer. The system includes a device for securing the semiconductor wafer in a heating area. The device includes a holding mechanism for securing an edge of the semiconductor wafer. The device further includes a pressure reducing device that reduces the pressure underneath the semiconductor device, which further secures the semiconductor device in the heating area. The heating area includes a plurality of heating and cooling zones in which the semiconductor wafer is subjected to various temperatures.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.