Embedded sigma-shaped semiconductor alloys formed in transistors by applying a uniform oxide layer prior to cavity etching
US8728896B2 · kind B2 · utility
5Cited by
26References
17Claims
0Family size
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Key dates
| Filing date | Sep 21, 2011 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Apr 4, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
When forming sophisticated transistors requiring an embedded semiconductor alloy, the cavities may be formed with superior uniformity on the basis of, for instance, crystallographically anisotropic etch steps by providing a uniform oxide layer in order to reduce process related fluctuations or queue time variations. The uniform oxide layer may be formed on the basis of an APC control regime.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.