Saving of data in cases of word-line to word-line short in memory arrays
US8730722B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2012 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Jan 30, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/1202
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technique of operating a non-volatile memory are presented so that in case data that would otherwise be lost in the case of a word line to word line short is preserved. Before writing a word line, the data from a previously written adjacent is word line is read back and stored in data latches associated with the corresponding bit lines, but that are not being used for the data to be written. If a short occurs, as the data for both word lines is still in the latches, it can be written to a new location. This technique can also be incorporated into cache write operations and for a binary write operation inserted into a pause of a multi-state write.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.