Methods for forming semiconductor devices

US8735232B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Peter Baars · Dresden, DE
• Matthias Goldbach · Dresden, DE

Key dates

• Filing date: Nov 29, 2011
• Grant date: May 27, 2014
• Expiry date: Nov 23, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31155
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods are provided for forming semiconductor devices. One method includes etching trenches into a silicon substrate and filling the trenches with an insulating material to delineate a plurality of spaced apart silicon fins. Dummy gate structures are formed, which includes a first dummy gate structure, that overlie and are transverse to the fins. A back fill material is filled between the dummy gate structures. The first dummy gate structure and an upper portion of the insulating material are removed to expose an active fins portion of the fins. The active fins portion is dimensionally modified to form an altered active fins portion. A high-k dielectric material and a work function determining gate electrode material are deposited overlying the altered active fins portion.