Method for fabricating a vertical LDMOS device
US8735294B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Oct 25, 2012 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Oct 25, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/516
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertically arranged laterally diffused metal-oxide-semiconductor (LDMOS) device includes a trench extending into a semiconductor body toward a semiconductor substrate. The trench includes sidewalls, a bottom portion connecting the sidewalls, a dielectric material lining the trench and a diffusion agent layer lining the dielectric material. A lightly doped drain region adjoins the trench and extends laterally around the sidewalls from the diffusion agent layer into the semiconductor body. In one implementation, a method for fabricating a vertically arranged LDMOS device includes forming a trench extending into a semiconductor body toward a semiconductor substrate, the trench including sidewalls, a bottom portion connecting the sidewalls, a dielectric material lining the trench and a diffusion agent layer lining the dielectric material. The method further includes diffusing impurities from the diffusion agent layer through the dielectric material to form a lightly doped drain region extending laterally around the sidewalls into the semiconductor body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.