Integrated circuits having a continuous active area and methods for fabricating same
US8736061B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 7, 2012 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Jun 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/959
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Integrated circuits and methods for fabricating integrated circuits are provided. In an embodiment, an integrated circuit includes a standard cell having a first boundary, a second boundary opposite the first boundary, a third boundary interconnecting the first and second boundaries, and a fourth boundary opposite the third boundary and interconnecting the first and second boundaries. The standard cell further includes parallel active areas extending from the first boundary to the second boundary. Also, the standard cell has parallel gate strips extending from the third boundary to the fourth boundary and over the active areas. A cut mask overlies the gate strips. An interconnect is positioned overlying the cut mask and forms an electrical connection with a selected gate strip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.