Flash memory with bias voltage for word line/row driver
US8737137B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 2013 |
| Grant date | May 27, 2014 |
| Priority date | — |
| Expiry date | Jan 22, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory device includes a word line driver circuit, a write voltage generator for providing a write voltage to the word line driver during a write operation to memory cells coupled to the word line driver circuit, and a write bias generator including an output node for providing a write bias voltage that is different from the write voltage to the word line driver circuit during a write operation to memory cells coupled to the word line driver circuit. The write bias voltage is used to reduce current drawn by the word line driver circuit from the write voltage generator during a write operation to memory cells coupled to the word line driver circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.