Metal oxide semiconductor (MOS) device with locally thickened gate oxide
US8741704B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | May 18, 2012 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Jun 17, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/691
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a semiconductor device including providing a gate structure on a channel portion of a semiconductor substrate, wherein the gate structure includes at least one gate dielectric on the channel portion of the semiconductor substrate and at least one gate conductor on the at least one gate dielectric. An edge portion of the at least one gate dielectric is removed on each side of the gate structure, wherein the removing of the edge portion of the gate dielectric provides an exposed base edge of the at least one gate conductor and an exposed channel surface of the semiconductor substrate underlying the gate structure. The sidewall of the gate structure is oxidized, which also oxidizes at least one of the exposed base edge of the at least one gate conductor and the exposed channel surface of the semiconductor substrate that is underlying the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.