Sonos memory cells having non-uniform tunnel oxide and methods for fabricating same
US8742496B2 · kind B2 · utility
0Cited by
2References
6Claims
0Family size
Assignee
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Key dates
| Filing date | Jun 17, 2013 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Jul 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/699
Abstract
Methods for forming a memory cell are disclosed. A method includes forming a source-drain structure in a semiconductor substrate where the source-drain structure includes a rounded top surface and sidewall surfaces. An oxide layer is formed on the top and sidewall surfaces of the source-drain structure. The thickness of the portion of the oxide layer that is formed on the top surface of the source-drain structure is greater than the thickness of the portion of the oxide layer that is formed on the sidewall surfaces of the source-drain structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.