Methods for suppressing power plane noise
US8743555B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2013 |
| Grant date | Jun 3, 2014 |
| Priority date | — |
| Expiry date | Aug 13, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Substrates having power planes, such as, for example, printed circuit boards, include at least one noise suppression structure configured to suppress electrical waves propagating through at least one of a first power plane and a second power plane. The at least one noise suppression structure may include a first power plane extension that extends from the first power plane generally toward the second power plane, and a second power plane extension that extends from the second power plane generally toward the first power plane. Methods for suppressing noise in at least one of the first power plane and second power plane include providing such noise suppression structures between the power planes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.