Methods of forming isolation structures and fins on a FinFET semiconductor device
US8753940B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2013 |
| Grant date | Jun 17, 2014 |
| Priority date | — |
| Expiry date | Mar 15, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
One method includes forming a plurality of trenches in a semiconducting substrate to define a plurality of fins, forming a layer of overfill material that overfills the trenches, wherein an upper surface of the overfill material is positioned above an upper surface of the fins, forming a masking layer above the layer of overfill material, wherein the masking layer has an opening that is positioned above a subset of the plurality of fins that is desired to be removed and wherein the subset of fins is comprised of at least one but less than all of the fins, performing an etching process through the masking layer to remove at least a portion of the layer of overfill material and expose the upper surface of the subset of fins, and performing a second etching process on the exposed surface of the subset of fins to remove the subset of fins.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.