Silicon and silicon germanium nanowire structures

US8753942B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Kelin J. Kuhn · Beaverton, US
• Seiyon Kim · Portland, US
• Rafael Rios · Portland, US
• Stephen M. Cea · Hillsboro, US
• Martin D. Giles · Portland, US
• Annalisa Cappellani · Portland, US
• Titash Rakshit · Austin, US
• Peter L. D. Chang · Portland, US
• Willy Rachmady · Beaverton, US

Key dates

• Filing date: Dec 1, 2010
• Grant date: Jun 17, 2014
• Expiry date: Jan 11, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.