Patent · US Active

Method and apparatus for memory access delay training

US8760946B2 · kind B2 · utility

11Cited by

3References

29Claims

0Family size

Assignee

Advanced Micro Devices, Inc. · US

Inventors

Glenn Dearth · Groton, US
Warren Anderson · Marlboro, US
Anwar Kashem · Cambridge, US
Richard W. Reeves · Westborough, US
Edoardo Prete · Birkenfeld, DE
Gerald R. Talbot · Boxborough, US

Key dates

Filing date	May 22, 2012
Grant date	Jun 24, 2014
Priority date	—
Expiry date	Jul 4, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/4076
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Various method and apparatus embodiments for training a delay for enabling a data strobe signal in a memory subsystem are disclosed. In one embodiment, a system includes a memory controller configured to receive a data strobe signal. The memory controller includes a training circuit. The training circuit includes a first storage circuit coupled to receive the data strobe signal on a data input and an enable signal on a clock input, and a training unit configured to, based on an output signal received from the first flip-flop, adjust a phase of the enable signal until an assertion of the enable signal coincides with a preamble indication in the data strobe signal.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.