Line and space architecture for a non-volatile memory device
US8765566B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 10, 2012 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jul 15, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/884
Abstract
A non-volatile memory device includes first wiring structures elongated in a first direction and separated by a first gap region in a second direction, the first gap region comprising first dielectric material formed in a first process, second wiring structures elongated in a second direction and separated by a second gap region in a first direction, the second gap region comprising second dielectric material formed in a second process, and a resistive switching devices comprising active conductive material, resistive switching material, and a junction material, wherein resistive switching devices are formed at intersections of the first wiring structures and the second wiring structures, wherein the junction material comprising p+ polysilicon material overlying the first wiring material, wherein some resistive switching devices are separated by the first gap region and some resistive switching devices separated by the second gap region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.