Memory devices with a connecting region having a band gap lower than a band gap of a body region
US8766320B2 · kind B2 · utility
7Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Apr 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/86
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices are shown that include a body region and a connecting region that is formed from a semiconductor with a lower band gap than the body region. Connecting region configurations can provide increased gate induced drain leakage during an erase operation. Configurations shown can provide a reliable bias to a body region for memory operations such as erasing, and containment of charge in the body region during a boost operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.