Patent · US Active

Method for depinning the fermi level of a semiconductor at an electrical junction and devices incorporating such junctions

US8766336B2 · kind B2 · utility

10Cited by
1References
84Claims
0Family size

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Inventors

Key dates

Filing dateNov 28, 2012
Grant dateJul 1, 2014
Priority date
Expiry dateNov 28, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/62
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An electrical device in which an interface layer comprising arsenic is disposed between and in contact with a conductor and a semiconductor. In some cases, the interface layer may be a monolayer of arsenic.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.