Through hole via filling using electroless plating
US8766422B2 · kind B2 · utility
3Cited by
4References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Aug 28, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An embedded wafer level ball grid array (eWLB) is formed by embedding a semiconductor die in a molding compound. A trench is formed in the molding compound with a laser drill. A first layer of copper is deposited on the sidewall of the trench by physical vapor deposition. A second layer of copper is then formed on the first layer of copper by an electroless process. A third layer of copper is then formed on the second layer by electroplating.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.