Semiconductor processing method and semiconductor structure
US8772163B2 · kind B2 · utility
0Cited by
3References
12Claims
0Family size
Assignee
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Key dates
| Filing date | May 31, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Dec 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor processing method that can generate a hole with different diameters, comprising: providing first material and second material different from the first material; and utilizing a etching process to etch the first material and the second material to form a hole through the first material and the second material; wherein the etching process has different etching rates for the first material and the second material such that the hole have different diameters. A semiconductor structure corresponding to the above-mentioned method is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.