Power semiconductor device and fabrication method thereof
US8772833B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Aug 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/411
Abstract
Disclosed are a power semiconductor device and a method of fabricating the same which can increase a breakdown voltage of the device through a field plate formed between a gate electrode and a drain electrode and achieve an easier manufacturing process at the same time. The power semiconductor device according to an exemplary embodiment of the present disclosure includes a source electrode and a drain electrode formed on a substrate; a dielectric layer formed between the source electrode and the drain electrode to have a lower height than heights of the two electrodes and including an etched part exposing the substrate; a gate electrode formed on the etched part; a field plate formed on the dielectric layer between the gate electrode and the drain electrode; and a metal configured to connect the field plate and the source electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.