Circuit structures, memory circuitry, and methods

US8772848B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• John K. Zahurak · Eagle, US
• Sanh D. Tang · Boise, US
• Lars Heineck · Dresden, DE
• Martin C. Roberts · Boise, US
• Wolfgang Mueller · Garden City, US
• Haitao Liu · Boise, US

Key dates

• Filing date: Jul 26, 2011
• Grant date: Jul 8, 2014
• Expiry date: Aug 2, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/0002
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator material over first semiconductor material, conductive material over the insulator material, and second semiconductor material over the conductive material. The array region includes vertical circuit devices which include the second semiconductor material. The peripheral region includes horizontal circuit devices which include the second semiconductor material. The horizontal circuit devices in the peripheral region individually have a floating body which includes the second semiconductor material. The conductive material in the peripheral region is under and electrically coupled to the second semiconductor material of the floating bodies. Conductive straps in the array region are under the vertical circuit devices. The conductive straps include the conductive material and individually are electrically coupled to a plurality of the vertical circuit devices in the array region. Other implementations are disclosed.