Modeling mechanical behavior with layout-dependent material properties
US8776005B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2013 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Jan 18, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Computer-implemented techniques for modeling the mechanical behavior of integrated circuits using layout-dependent material properties are disclosed. The back end of line wiring that connects an integrated circuit to a substrate undergoes stresses and strains due to many heating and cooling cycles during a chip's packaging and lifecycle. Depending on integrated circuit design style, there may be vastly different thermal profiles across the integrated circuit. The mechanical behavior caused by the thermal cycles of the wire, vias, and insulators comprising the BEOL materials is simulated. Extraction of the integrated circuit structural information, regarding the BEOL materials, yields anisotropic information. Layout-dependent material volume fractions are computed using integrated circuit structural information. Anisotropic mechanical properties are determined based on the structural information. Mechanical responses are calculated based on the anisotropic material properties and the calculated material-volume fractions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.