Flattened substrate surface for substrate bonding

US8778737B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Edward C. Cooney, III · Jericho, US
• James S. Dunn · Jericho, US
• Dale W. Martin · Hyde Park, US
• Charles F. Musante · Burlington, US
• BethAnn Rainey · South Burlington, US
• Leathen Shi · Yorktown Heights, US
• Edmund J. Sprogis · Underhill, US
• Cornelia K. Tsang · Potsdam, US

Key dates

• Filing date: Oct 31, 2011
• Grant date: Jul 15, 2014
• Expiry date: Oct 31, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/15788
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Methods for bonding substrate surfaces, bonded substrate assemblies, and design structures for a bonded substrate assembly. Device structures of a product chip are formed using a first surface of a device substrate. A wiring layer of an interconnect structure for the device structures is formed on the product chip. The wiring layer is planarized. A temporary handle wafer is removably bonded to the planarized wiring layer. In response to removably bonding the temporary handle wafer to the planarized first wiring layer, a second surface of the device substrate, which is opposite to the first surface, is bonded to a final handle substrate. The temporary handle wafer is then removed from the assembly.