Electronic component package and manufacturing method thereof
US8779580B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2008 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Apr 23, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component package and a manufacturing method thereof are disclosed. The electronic component package manufacturing method, which includes mounting an electronic component in one surface of a first insulation layer; bonding a heat sink to the one surface of the first insulation layer, corresponding to the electronic component, to cover the electronic component, the heat sink being formed with a cavity; charging the cavity with an adhesive; and forming a circuit pattern in the other surface of the first insulation layer, can prevent a void from being generated in the adhesive, make the handling stable and make the size small by allowing the heat sink formed with the cavity to cover the electronic component before the pattern build-up and supplying the adhesive through one side of the cavity while providing negative pressure through the other side.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.