PB-free solder bumps with improved mechanical properties
US8779587B2 · kind B2 · utility
1Cited by
7References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 16, 2008 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Feb 7, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device, comprising a semiconductor substrate having a first metal pad formed thereover, a device package substrate having a second metal pad formed thereover, and, a doped solder bump. The doped solder bump is located between and in contact with said first and second metal pads. The doped solder bump consisting of Sn, one or both of Ag and Cu, and a fourth row transition metal dopant in a concentration range from 0.35 wt. % to 2 wt. %.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.