Liner layers for metal interconnects
US8779589B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 2010 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Mar 12, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Electrical interconnects for integrated circuits and methods of fabrication of interconnects are provided. Devices are provided comprising copper interconnects having metallic liner layers comprising silver and a second component, such as, lanthanum, titanium, tungsten, zirconium, antimony, or calcium. Methods include providing a substrate having a trench or via formed therein, forming a silver alloy layer, comprising silver and a second component selected from the group consisting of lanthanum, titanium, tungsten, zirconium, antimony, and calcium, onto surfaces of the feature, depositing a copper seed layer, and depositing copper into the feature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.