Semiconductor device including ultra low-K (ULK) metallization stacks with reduced chip-package interaction
US8786088B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2010 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Dec 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In complex semiconductor devices, sophisticated ULK materials may be used in metal line layers in combination with a via layer of enhanced mechanical stability by increasing the amount of dielectric material of superior mechanical strength. Due to the superior mechanical stability of the via layers, reflow processes for directly connecting the semiconductor die and a package substrate may be performed on the basis of a lead-free material system without unduly increasing yield losses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.