Fan out build up substrate stackable package and method
US8796561B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2009 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Jan 21, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1469
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fan out build up substrate stackable package includes an electronic component having an active surface including a bond pad. A package body encloses the electronic component, the package body having a first surface coplanar with the active surface of the electronic component. A buildup dielectric layer is applied to the active surface of the electronic component and the first surface of the package body. A circuit pattern is formed within the first buildup dielectric layer and electrically connected to the bond pad, the first circuit pattern including via capture pads. Via capture pad apertures extend through the package body and expose the via capture pads. In this manner, direct connection to the first circuit pattern, i.e., the first metal layer, of the fan out build up substrate stackable package is facilitated. Further, the fan out build up substrate stackable package is extremely thin resulting in extremely thin stacked assemblies.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.