Christopher M. Scanlan
70Patents
23h-index
32Co-inventors
88Inventor score
Filing activity: Feb 1, 1996 → Apr 22, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7777351B1 | Thin stacked interposer package | Electricity | 347 | Active |
| US7633765B1 | Semiconductor package including a top-surface metal layer for implementing circuit features | Electricity | 332 | Active |
| US6686649B1 | Multi-chip semiconductor package with integral shield and antenna | Electricity | 225 | Expired |
| US7550857B1 | Stacked redistribution layer (RDL) die assembly package | Electricity | 142 | Active |
| US8319338B1 | Thin stacked interposer package | Electricity | 130 | Active |
| US7049682B1 | Multi-chip semiconductor package with integral shield and antenna | Electricity | 104 | Expired |
| US7342303B1 | Semiconductor device having RF shielding and method therefor | Electricity | 102 | Expired |
| US7825520B1 | Stacked redistribution layer (RDL) die assembly package | Electricity | 87 | Active |
| US5751552A | Semiconductor device balancing thermal expansion coefficient mismatch | Electricity | 86 | Expired |
| US7745910B1 | Semiconductor device having RF shielding and method therefor | Electricity | 84 | Active |
| US7960827B1 | Thermal via heat spreader package and method | Electricity | 82 | Active |
| US7851894B1 | System and method for shielding of package on package (PoP) assemblies | Electricity | 78 | Active |
| US6546620B1 | Flip chip integrated circuit and passive chip component package fabrication method | Emerging Cross-Sectional Technologies | 57 | Expired |
| US8093691B1 | System and method for RF shielding of a semiconductor package | Electricity | 56 | Active |
| US7898066B1 | Semiconductor device having EMI shielding and method therefor | Electricity | 46 | Active |
| US6356453B1 | Electronic package having flip chip integrated circuit and passive chip component | Electricity | 45 | Expired |
| US8018068B1 | Semiconductor package including a top-surface metal layer for implementing circuit features | Electricity | 42 | Active |
| US9887103B2 | Semiconductor device and method of adaptive patterning for panelized packaging | Electricity | 37 | Active |
| US8629546B1 | Stacked redistribution layer (RDL) die assembly package | Electricity | 36 | Active |
| US8796561B1 | Fan out build up substrate stackable package and method | Electricity | 29 | Active |
| US7507603B1 | Etch singulated semiconductor package | Electricity | 28 | Expired |
| US9040316B1 | Semiconductor device and method of adaptive patterning for panelized packaging with dynamic via clipping | Electricity | 24 | Active |
| US7781852B1 | Membrane die attach circuit element package and method therefor | Electricity | 24 | Active |
| US8227338B1 | Semiconductor package including a top-surface metal layer for implementing circuit features | Electricity | 21 | Active |
| US9177926B2 | Semiconductor device and method comprising thickened redistribution layers | Electricity | 18 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.